Apparatus and method of fast commutation for matrix converter-based rectifier

ABSTRACT

A method of commutation in a matrix rectifier from an active vector to a zero vector includes two steps. A method of commutation in a matrix rectifier from a zero vector to an active vector includes three steps.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to matrix converters. More specifically,the present invention relates to fast commutation for the rectifiers ofmatrix converters.

2. Description of the Related Art

FIG. 1A is a circuit diagram showing the topology of a3-phase-to-1-phase matrix converter, and FIG. 1B is an equivalentcircuit diagram of a portion of the 3-phase-to-1-phase matrix convertershown in FIG. 1A. Each of the circuits shown in FIGS. 1A and 1B can beused either with known commutation methods discussed in this section orwith the novel commutation methods according to the preferredembodiments of the present invention discussed in the DetailedDescription of Preferred Embodiments section below.

In FIG. 1A, “line side” refers to the portion of the circuit on theleft-hand side of the transformer T_(r) that is connected to the linevoltages u_(a), u_(b), u_(c) for each of the phases A, B, C, and “loadside” refers to the portion of the circuit on the right-hand side of thetransformer T_(r) that is connected to the output voltage u_(o), i.e.,the load. On the line side, the three-phase AC current is combined intoa single-phase AC current, and on the load side, the single-phase ACcurrent is rectified by diodes D₁ to D₄ to provide DC current.

The isolated matrix rectifier of FIG. 1A includes filter inductors L_(f)and filter capacitors C_(f) that define a line-side filter that reducesthe total harmonic distortion (THD), bi-directional switches S₁ to S₆arranged in a bridge as a 3-phase-to-1-phase matrix converter, atransformer T_(r) that provides high-voltage isolation between theline-side circuit and the load-side circuit, four diodes D₁ to D₄arranged in a bridge to provide output rectification, an output inductorL_(o) and an output capacitor C_(o) that define a load-side filter forthe output voltage. Bi-directional switches S₁ to S₆ are used in thisisolated matrix rectifier to open or close the current path in eitherdirection. As shown in FIG. 1A, the bi-directional switches S₁ to S₆include two uni-directional switches connected in parallel. Thus, switchS_(i) in FIG. 1A corresponds to switches S_(1i) and S_(2i) in FIG. 1B,where i=1, 2, 3, 4, 5, 6.

As shown in FIG. 1A, the rectifier of the matrix converter preferablyincludes two parts: (1) a 3-phase-to-1-phase matrix converter and (2) adiode rectifier. The matrix converter and the diode rectifier areisolated by a high-frequency transformer T_(r). As shown in FIG. 1B, thematrix converter can be considered a reverse parallel connection of twocurrent-source rectifiers that are labeled as converter #1 and converter#2. Converter #1 can provide a positive voltage pulse and can bereferred to as a positive rectifier, and converter #2 can provide anegative voltage pulse and can be referred to as a negative rectifier.

The controller of the matrix converter turns the switches S₁ to S₆ onand off to generate a desired output voltage u_(o). One method fordetermining when and for how long the switches S₁ to S₆ are turned on isspace-vector modulation (SVM). SVM is an algorithm for the pulse-widthmodulation (PWM) of the switches S₁ to S₆. That is, SVM is used todetermine when the bi-directional switches S₁ to S₆ should be turned onand off. The bi-directional switches S₁ to S₆ are controlled by digitalsignals, e.g., either ones or zeros. Typically, a one means the switchis on, and a zero means the switch is off. In PWM, the width of the onsignal, controls how long a switch is turned on, i.e., modulated.Implementations of SVM are disclosed in U.S. Application No. 62/069,815,which is hereby incorporated by reference in its entirety.

For the matrix converter shown in FIG. 1A, the switching function S_(i)can be defined as

$S_{i} = \left\{ {{\begin{matrix}{1,} & {S_{i}\mspace{14mu} {turn}\mspace{14mu} {on}} \\{0,} & {S_{i}\mspace{14mu} {turn}\mspace{14mu} {off}}\end{matrix}i} \in \left\{ {1,2,3,4,5,6} \right\}} \right.$

where S_(i) is the switching function for the i^(th) switch. Forexample, if S₁=1, then switch S₁ is on, and if S₁=0, then switch S₁ isoff.

In FIG. 1A, only two switches can be turned on at the same time todefine a single current path. For example, if switches S₁ and S₆ are on,a single current path is defined between phases A and B through thetransformer T_(r). If only two switches can conduct at the same time,with one switch in the top half of the bridge (S₁, S₃, S₅) and with theother switch in the bottom half of the bridge (S₂, S₄, S₆), then thereare nine possible switching states as listed in Tables 1 and 2,including six active switching states and three zero switching states.In Table 1, line currents i_(a), i_(b), i_(c) are the currents in phasesA, B, C, and the line-side current i_(p) is the current through theprimary winding of the transformer T_(r). In Table 2, the transformerturns ratio k is assumed to be 1 so that the inductor current i_(L) isequal to the line-side current i_(p).

TABLE 1 Space Vectors, Switching States, and Phase Currents SpaceSwitching States Vector S₁ S₂ S₃ S₄ S₅ S₆ i_(a) i_(b) i_(c) I₁ 1 0 0 0 01 i_(p) −i_(p) 0 I₂ 1 1 0 0 0 0 i_(p) 0 −i_(p) I₃ 0 1 1 0 0 0 0 i_(p)−i_(p) I₄ 0 0 1 1 0 0 −i_(p) i_(p) 0 I₅ 0 0 0 1 1 0 −i_(p) 0 i_(p) I₆ 00 0 0 1 1 0 −i_(p) i_(p) I₇ 1 0 0 1 0 0 0 0 0 I₈ 0 0 1 0 0 1 0 0 0 I₉ 01 0 0 1 0 0 0 0

TABLE 2 Space Vectors, Switching States, and Phase Currents SpaceSwitching States Vector S₁ S₂ S₃ S₄ S₅ S₆ i_(a) i_(b) i_(c) I₁ 1 0 0 0 01 i_(d) −i_(d) 0 I₂ 1 1 0 0 0 0 i_(d) 0 −i_(d) I₃ 0 1 1 0 0 0 0 i_(d)−i_(d) I₄ 0 0 1 1 0 0 −i_(d) i_(d) 0 I₅ 0 0 0 1 1 0 −i_(d) 0 i_(d) I₆ 00 0 0 1 1 0 −i_(d) I_(d) I₇ 1 0 0 1 0 0 0 0 0 I₈ 0 0 1 0 0 1 0 0 0 I₉ 01 0 0 1 0 0 0 0

The matrix-converter's controller determines a reference current {rightarrow over (I)}_(ref) and calculates the on and off times of theswitches S₁ to S₆ to approximate the reference current {right arrow over(I)}_(ref) to produce the line-side currents i_(a), i_(b), and i_(c).The reference current {right arrow over (I)}_(ref) preferably issinusoidal with a fixed frequency and a fixed magnitude: {right arrowover (I)}_(ref)={right arrow over (I)}_(ref)e^(jθ). The fixed frequencyis preferably the same as the fixed frequency of each of the three-phasei_(a)(t), i_(b)(t), and i_(c)(t) to reduce harmful reflections. Thecontroller determines the magnitude of the reference current {rightarrow over (I)}_(ref) to achieve a desired output voltage u_(o). Thatis, the controller regulates the output voltage u_(o) by varying themagnitude of the reference current {right arrow over (I)}_(ref). Varyingthe magnitude of the reference current {right arrow over (I)}_(ref)changes the on and off times of the switches S₁ to S₆.

The reference current {right arrow over (I)}_(ref) moves through the α-βplane shown in FIG. 14. The angle θ is defined as the angle between thea-axis and the reference current {right arrow over (I)}_(ref). Thus, asthe angle θ changes, the reference current {right arrow over (I)}_(ref)sweeps through the different sectors I-VI.

The reference current {right arrow over (I)}_(ref) can be synthesized byusing combinations of the active and zero vectors. As used herein“synthesized” means that the reference current {right arrow over(I)}_(ref) can be represented as a combination of the active and zerovectors. The active and zero vectors are stationary and do not move inthe α-β plane as shown in FIG. 14. The vectors used to synthesize thereference current {right arrow over (I)}_(ref) change depending on whichsector the reference current {right arrow over (I)}_(ref) is located.The active vectors are chosen by the active vectors defining the sector.The zero vector is chosen for each sector by determining which on switchthe two active vectors have in common and choosing the zero vector thatalso includes the same on switch. Using the zero vectors allows themagnitude of the line-side current i_(p) to be adjusted.

For example, consider when the current reference {right arrow over(I)}_(ref) is in sector I. The active vectors {right arrow over (I)}₁and {right arrow over (I)}₂ define sector I. The switch S₁ is on forboth active vectors {right arrow over (I)}₁ and {right arrow over (I)}₂.The zero vector {right arrow over (I)}₇ also has the switch S₁ on. Thus,when the reference current {right arrow over (I)}_(ref) is located insector I, the active vectors {right arrow over (I)}₁ and {right arrowover (I)}₂ and zero vector {right arrow over (I)}₇ are used tosynthesize the reference current {right arrow over (I)}_(ref), whichprovides the following equation, with the right-hand side of theequation resulting from vector {right arrow over (I)}₇ being a zerovector with zero magnitude:

${\overset{\rightarrow}{I}}_{ref} = {{{\frac{T_{1}}{T_{s}}{\overset{\rightarrow}{I}}_{1}} + {\frac{T_{2}}{T_{s}}{\overset{\rightarrow}{I}}_{2}} + {\frac{T_{7}}{T_{s}}{\overset{\rightarrow}{I}}_{7}}} = {{\frac{T_{1}}{T_{s}}{\overset{\rightarrow}{I}}_{1}} + {\frac{T_{2}}{T_{s}}{\overset{\rightarrow}{I}}_{2}}}}$

where T₁, T₂, and T₀ are the dwell times for the corresponding activeswitches and T_(s) is the sampling period.

The dwell time is the on time of the corresponding switches. Forexample, T₁ is the on time of the switches S₁ and S₆ for the activevector {right arrow over (I)}₁. Because the switch S₁ is on for each ofvectors {right arrow over (I)}₁, {right arrow over (I)}₂, and {rightarrow over (I)}₇, the switch S₁ is on during the entire sampling periodT_(s). The ratio T₁/T_(s) is the duty cycle for the switch S₆ during thesampling period T_(s).

The sampling period T_(s) is typically chosen such that the referencecurrent {right arrow over (I)}_(ref) is synthesized multiple times persector. For example, the reference current {right arrow over (I)}_(ref)can be synthesized twice per sector so that the reference current {rightarrow over (I)}_(ref) is synthesized twelve times per cycle, where onecomplete cycle is when the reference current {right arrow over(I)}_(ref) goes through sectors I-VI.

The dwell times can be calculated using the ampere-second balancingprinciple, i.e., the product of the reference current {right arrow over(I)}_(ref) and sampling period T_(s) equals the sum of the currentvectors multiplied by the time interval of synthesizing space vectors.Assuming that the sampling period T_(s) is sufficiently small, thereference current {right arrow over (I)}_(ref) can be consideredconstant during the sampling period T_(s). The reference current {rightarrow over (I)}_(ref) can be synthesized by two adjacent active vectorsand a zero vector. For example, when the reference current {right arrowover (I)}_(ref) is in sector I, the reference current {right arrow over(I)}_(ref) can be synthesized by vectors {right arrow over (I)}₁, {rightarrow over (I)}₂, and {right arrow over (I)}₇. The ampere-secondbalancing equation is thus given by the following equations.

{right arrow over (I)} _(ref) T _(s) ={right arrow over (I)} ₁ T ₁+{right arrow over (I)} ₂ T ₂ +{right arrow over (I)} ₇ T ₇

T _(s) =T ₁ +T ₂ +T ₇

where T₁, T₂, and T₇ are the dwell times for the vectors {right arrowover (I)}₁, {right arrow over (I)}₂, and {right arrow over (I)}₇ andT_(s) is sampling time. Then the dwell times are given by

T₁ = mT_(s)sin (π/6 − θ) T₂ = mT_(s)sin (π/6 + θ)${T_{7} = {{T_{s} - T_{1} - {T_{2}{where}m}} = {k\frac{I_{ref}}{i_{L}}}}},$

θ is sector angle between current reference {right arrow over (I)}_(ref)and a-axis shown in FIG. 5, and k is the transformer turns ratio.

Because of the isolation provided by the transformer, thematrix-converter output voltage u₁(t) must alternate between positiveand negative with high frequency to maintain the volt-sec balance. Thus,the preferred vector sequence in every sampling period T_(s) is dividedinto eight segments as {right arrow over (I)}_(α), {right arrow over(I)}₀, −{right arrow over (I)}_(β), {right arrow over (I)}₀, {rightarrow over (I)}_(β), {right arrow over (I)}₀, −{right arrow over(I)}_(α), {right arrow over (I)}₀, where vectors {right arrow over(I)}_(α) and {right arrow over (I)}_(β) are active vectors and {rightarrow over (I)}₀ is a zero vector. For example, in sector I, vectors{right arrow over (I)}_(α) and {right arrow over (I)}_(β) are activevectors {right arrow over (I)}₁ and {right arrow over (I)}₂, and vector{right arrow over (I)}₀ is zero vector {right arrow over (I)}₇. Whenconverter #1 is active, a positive vector can be used, and whenconverter #2 is active, a negative vector can be used.

The waveforms of the matrix-converter output voltage u₁(t) and thematrix-converter output current i_(p)(t) during one sampling periodT_(s) are shown in FIG. 5. In FIG. 5, the matrix-converter outputvoltage u_(i)(t) has three kinds of polarities:

-   -   (1) u₁(t) has positive polarity between times t₀ and t₁ and        between times t₄ and t₅. These time intervals can be referred to        as P-intervals. The current vector in a P-interval can be        referred to as a P-vector. Under the effect of a P-vector, the        matrix-converter output current i_(p)(t) increases.    -   (2) u₁(t) has negative polarity between times t₂ and t₃ and        between times t₆ and t₇. These time intervals can be referred to        as N-intervals. The current vector in a N-interval can be        referred to as a N-vector. Under the effect of an N-vector, the        matrix-converter output current it) decreases.    -   (3) u₁(t) is zero between times t₁ and t₂, between times t₃ and        t₄, between times t₅ and t₆, and between times t₇ and t₈. These        time intervals can be referred to as Z-intervals. The current        vector in a Z-interval can be referred to as a Z-vector. Under        the effect of a Z-vector, the absolute value of the        matrix-converter output current i_(p)(t) decreases at most to be        zero, and the direction of the matrix-converter output current        i_(p)(t) will not change during the Z-interval.

In one sampling period T_(s), the eight intervals are in sequence:P-interval, Z-interval, N-interval, Z-interval, P-interval, Z-interval,N-interval, Z-interval. As shown in FIG. 5, there is a commutationbetween the different intervals.

Commutation refers to turning on and off of the switches to switch fromone vector to another vector. Known commutation methods for matrixconverters are 4-step commutation methods based on either output currentor input voltage. These known commutation methods are very complicatedand require accurately measuring either the output current or the inputvoltage.

(1) Known 4-Step Current-Based Commutation

The 4-step current-based commutation measures the output currentdirection. The two-phase-to-single-phase matrix converter in FIG. 2illustrates the problems with current-based commutation. All theimportant commutations can be seen in the circuit shown in FIG. 2.

As an example, assume that switches S₁₁ and S₂₁ are initially on and theswitches S₁₃ and S₂₃ are initially off so that current can flow ineither direction in the bi-directional switch on the left side of FIG. 2and assume that we want to turn off the bi-directional switch on theleft side of FIG. 2 and turn on the bi-directional switch on the rightside of FIG. 2. As shown in FIG. 3A, when the current i >0, thefollowing four steps can be used:

-   -   (4) switch S₁₁ turns off;    -   (5) switch S₂₃ turns on;    -   (6) switch S₂₁ turns off;    -   (7) switch S₁₃ turns on.

As shown in FIG. 3B, when the current i<0, the following four-stepcommuting method is possible:

-   -   (8) switch S₂₁ turns off;    -   (9) switch S₁₃ turn on;    -   (10) switch S₁₁ turns off;    -   (11) switch S₂₃ turns on.

(2) Known 4-Step Voltage-Based Commutation

Known 4-step voltage-based commutation is similar to current-basedcommutation. Assuming that switches S₁₁ and S₂₁ are on and switches S13and S23 are off so that current can flow in either direction in thebi-directional switch on the left side of FIG. 2 and assume that thebi-directional switch on the left side of FIG. 2 is to be turned off,and the bi-directional switch on the right side of FIG. 2 is to beturned on. As shown in FIG. 4A, when voltage u_(a)>voltage u_(b), thefollowing four steps can be used:

-   -   (12) switch S₂₃ turns on;    -   (13) switch S₂₁ turns off;    -   (14) switch S₁₃ turns on;    -   (15) switch S₁₁ turns off.

As shown in FIG. 4B, when the voltage u_(a)<voltage u_(b), the followingfour steps can be used:

-   -   (16) switch S₁₃ turns on;    -   (17) switch S₁₁ turns off;    -   (18) switch S₂₃ turns on;    -   (19) switch S₂₁ turns off.

Both current- and voltage-based commutation methods have problems suchas taking a very long time to complete commutation, requiringcomplicated logic circuitry to implement the commutation methods, andrequiring accurate current or voltage measurements. The frequency usingthese known commutation methods is limited because of the long time ittakes to complete the commutation.

SUMMARY OF THE INVENTION

To overcome the problems described above, preferred embodiments of thepresent invention provide fast commutation. Preferred embodiments of thepresent invention provide 2- or 3-step commutation that achieves one ormore of the following advantages:

-   -   (20) shorter time to complete commutation.    -   (21) no need to measure the output current or input voltage        because, in a rectifier-based matrix converter, the primary        current i_(p) of the transformer is well defined because the        input power factor is unity, i.e. the line-side current and        voltage are in the same phase.    -   (22) easier implementation than known 4-step commutation        methods.    -   (23) suitable for high-frequency applications.

A matrix rectifier that can be used with the preferred embodiments ofthe present invention includes first, second, and third phases; anduni-directional switches S_(ij), where i=1, 2 and j=1, 2, 3, 4, 5, 6 andwhere uni-directional switches S_(1j) and S_(2j) are connected togetherto define first, second, third, fourth, fifth, and sixth bi-directionalswitches. First ends of the first, third, and fifth bidirectionalswitches are connected together to provide a positive-voltage node.First ends of the second, fourth, and sixth bidirectional switches areconnected together to provide a negative-voltage node. Second ends ofthe first and fourth bidirectional switches are connected to the firstphase. Second ends of the third and sixth bidirectional switches areconnected to the second phase. Second ends of the fifth and secondbidirectional switches are connected to the third phase. A zero vectoris defined by either uni-directional switches S_(1m) and S_(1n) switchedon or uni-directional switches S_(2m) and S_(2n) switched on, where (m,n)=(1, 4), (3, 6), (5, 2), and by all other uni-directional switchesS_(pq) switched off, where p≠m and q≠n. An active vector is defined byeither uni-directional switches S_(1m) and S_(1n) switched on oruni-directional switches S_(2m) and S_(2n) switched on, where m=1, 3, 5;n=2, 4, 6; and m, n are not connected to the same phase, and by allother uni-directional switches S_(pq) switched off, where p≠m and q≠n.Sectors I, II, III, IV, V, and VI are defined by using active vectorswith (a, b)=(1, 6), (1, 2), (3, 2), (3, 4), (5, 4), and (5, 6).

According to a preferred embodiment of the present invention, a methodof performing commutation in a matrix rectifier from an active vector toa zero vector includes

-   -   step (a):        -   for an active vector with uni-directional switches S_(1m)            and S_(1n) switched on,            -   in Sectors I, III, V, turning on uni-directional switch                S_(1x), where x is chosen such that (m, x)=(1, 4), (3,                6), (5, 2); and            -   in Sectors II, IV, VI, turning on uni-directional switch                S_(1x), where x is chosen such that (x, n)=(1, 4), (3,                6), (5, 2); or        -   for an active vector with uni-directional switches S_(2m)            and S_(2n) switched on,            -   in Sectors I, III, V, turning on uni-directional switch                S_(2y), where y is chosen such that (y, n)=(1, 4), (3,                6), (5, 2); and            -   in Sectors II, IV, VI, turning on uni-directional switch                S_(2y), where y is chosen such that (m, y)=(1, 4), (3,                6), (5, 2);    -   step (b):        -   for the active vector with uni-directional switches S_(1m)            and S_(1n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional switch                S_(1n); and            -   in Sectors II, IV, VI, turning off uni-directional                switch S_(1m); or        -   for the active vector with uni-directional switches S_(2m)            and S_(2n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional switch                S_(2m);            -   in Sectors II, IV, VI, turning off uni-directional                switch S_(2n).

Commutation is preferably performed by measuring input voltage andwithout measuring output current or output voltage.

According to a preferred embodiment of the present invention, a methodof operating a matrix rectifier includes performing commutation from anactive vector to a zero vector using the commutation method according tovarious other preferred embodiments of the present invention andmodulating the first, second, third, fourth, fifth, and sixthbi-directional switches based on space vector modulation.

According to a preferred embodiment of the present invention, a methodof performing commutation in a matrix rectifier from a zero vector to anactive vector includes:

-   -   step (a):        -   for a zero vector with uni-directional switches S_(1m) and            S_(1n) switched on,            -   in Sectors I, III, V, turning on uni-directional switch                S_(1x), where x=1, 3, 5 and x is chosen such that a                negative voltage is provided at the positive-voltage                node; and            -   in Sectors II, IV, VI, turning on uni-directional switch                S_(1x), where x=2, 4, 6 and x is chosen such that a                positive voltage is provided at the negative-voltage                node; or        -   for a zero vector with uni-directional switches S_(2m) and            S_(2n) switched on,            -   in Sectors I, III, V, turning on uni-directional switch                S_(2y), where y=2, 4, 6 and y is chosen such that a                positive voltage is provided at the negative-voltage                node; and            -   in Sectors II, IV, VI, turning on uni-directional switch                S_(2y), where y=1, 3, 5 and y is chosen such that a                negative voltage is provided at the positive-voltage                node;    -   step (b):        -   for the zero vector with uni-directional switches S_(1m) and            S_(1n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional switch                S_(1m); and            -   in Sectors II, IV, VI, turning off uni-directional                switch S_(1n); or        -   for the zero vector with uni-directional switches S_(2m) and            S_(2n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional switch                S_(2n); and            -   in Sectors II, IV, VI, turning off uni-directional                switch S_(2m); and step (c):        -   for the zero vector with uni-directional switches S_(1m) and            S_(1n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional                switches S_(1x) and S_(1n) and turning on                uni-directional switches S_(2x) and S_(2n); and            -   in Sectors II, IV, VI, turning off uni-directional                switches S_(1x) and S_(1m) and turning on                uni-directional switches S_(2x) and S_(2m); or        -   for the zero vector with uni-directional switches S_(2m) and            S_(2n) initially switched on,            -   in Sectors I, III, V, turning off uni-directional                switches S_(2m) and S_(2y) and turning on                uni-directional switches S_(1m) and S_(iy); and            -   in Sectors II, IV, VI, turning off uni-directional                switches S_(2n) and S_(2y) and turning on                uni-directional switches S_(1n) and S_(iy).

Commutation is preferably performed by measuring input voltage andwithout measuring output current or output voltage. Preferably, in step(a), for the zero vector with uni-directional switches S_(1m) and S_(1n)initially switched on, no current passes through uni-directional switchS_(1x); or for the zero vector with uni-directional switches S_(2m) andS_(2n) initially switched on, no current passes through uni-directionalswitch S_(2y). Preferably, step (b) lasts until a current through thepositive-voltage node or the negative-voltage node reaches zero. Themethod further preferably includes a transformer connected to thepositive-voltage and negative-voltage nodes, where a holding time Δt ofstep (b) is provided by:

${\Delta t} = \frac{L_{o}I_{1\max}}{U_{1{{mi}n}}}$

where I_(1max) is a maximum current of the matrix converter, U_(1min) isa minimum output voltage of the matrix converter, and L_(o) is a leakageinductance of the transformer.

According to a preferred embodiment of the present invention, a methodof operating a matrix rectifier includes performing commutation from azero vector to an active vector using the commutation method accordingto various other preferred embodiments of the present invention andmodulating the first, second, third, fourth, fifth, and sixthbi-directional switches based on space vector modulation.

Preferably, gate signals s_(ij) applied to uni-directional switchesS_(ij) are generated by determining a space-vector-modulation sector andgenerating:

-   -   a carrier signal;    -   first, second, and third comparison signals based on dwell times        of corresponding zero vector and two active vectors of the        space-vector-modulation sector;    -   modulation signals s_(i) corresponding to the first, second,        third, fourth, fifth, and sixth bi-directional switches based on        the comparison of the carrier signal and the first, second, and        third comparison signals, where i=1, 2, 3, 4, 5, 6;    -   first converter select signal SelectCon1 and second converter        select signal SelectCon2 based on if a positive or a negative        voltage is outputted; wherein the gate signals s_(ij) are        generated based on:

s _(1j) =s _(i)×SelectCon1(j=1,3,5,4,6,2)

s _(2j) =s _(i)×SelectCon2(j=1,3,5,4,6,2).

The above and other features, elements, characteristics, steps, andadvantages of the present invention will become more apparent from thefollowing detailed description of preferred embodiments of the presentinvention with reference to the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B are circuit diagrams of matrix-converters.

FIG. 2 is a circuit diagram of a two-phase-to-single-phase matrixconverter.

FIGS. 3A and 3B show the steps of current-based commutation.

FIGS. 4A and 4B show the steps of voltage-based commutation.

FIG. 5 shows the waveforms of the rectifier of a matrix converter.

FIG. 6 shows eight switching modes in one sampling period in sector I.

FIGS. 7A and 7B show 2-step commutation from an active vector to a zerovector for a positive current in sector I.

FIGS. 8A and 8B show 3-step commutation from a zero vector to an activevector.

FIG. 9 is a block diagram of gate-signal generator.

FIG. 10 shows SVM-modulation and commutation signals in one samplingperiod.

FIG. 11 shows gate signals in one sampling period in sector I.

FIG. 12 shows 2-step commutation at time t₂.

FIG. 13 shows 3-step commutation at time t₃.

FIG. 14 shows a current-space vector hexagon.

FIG. 15 shows 2-step commutation from an active vector to a zero vectorfor a negative current in sector I.

FIG. 16 shows 3-step commutation from a zero vector to an active vectorfor a negative current in sector I.

FIG. 17 shows 2-step commutation from an active vector to a zero vectorfor a positive current in sector II.

FIG. 18 shows 3-step commutation from a zero vector to an active vectorfor a postive current in sector II.

FIG. 19 shows 2-step commutation from an active vector to a zero vectorfor a negative current in sector II.

FIG. 20 shows 3-step commutation from a zero vector to an active vectorfor a negative current in sector II.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Preferred embodiments of the present invention improve the knownfour-step commutation methods. Current commutation can ensure reliableoperation. Because the rectifiers of 3-phase-to-1-phasematrix-converters have a different structure compared to the rectifiersof known 3-phase-to-3-phase matrix converters, rectifiers of a3-phase-to-1-phase matrix-converter can use a different current-basedcommutation method, as discussed below.

As shown in FIG. 5, the matrix-converter output current i_(p)(t) ispositive in adjacent P- and Z-intervals, except for the commutationarea, and the matrix-converter output current i_(p)(t) is negative inadjacent N- and Z-intervals, except for the commutation area. Duringadjacent P- and Z-intervals, converter #1 works normally and converter#2 stops working, and in contrast, during adjacent N- and Z-intervals,converter #2 works normally and converter #1 stops working. Thus, thereare eight switching modes in one sampling period exclusive of thecommutation areas as shown in FIG. 6. In one sampling period, there aretwo types of current-based commutations: (1) active vector (i.e., eitherP-vector or N-vector) to zero vector and (2) zero vector to activevector. A two-step active-vector-to-zero-vector commutation and athree-step zero-vector-to-active-vector commutation are discussed below.

(1) Active Vector to Zero Vector (P-Vector to Z-Vector or N-Vector toZ-Vector)

As seen in FIGS. 5 and 6, active-vector-to-zero-vector commutationsinclude the commutations from mode 1 (P-vector) to mode 2 (Z-vector),mode 3 (N-vector) to mode 4 (Z-vector), mode 5 (P-vector) to mode 6(Z-vector), and mode 7 (N-vector) to mode 8 (Z-vector). Duringactive-vector-to-zero-vector commutation, the direction of the outputcurrent of the rectifier of the matrix converter does not change. Thus,active-vector-to-zero-vector commutation only adds an overlap time justas the commutation method of the current-source inverter. The overlaptime is added to make sure that the current can smoothly transition fromone switch to another switch and that no overvoltage is induced duringthis transition. The overlap time is determined by the “turn on” and“turn off” speed of these two switches. For example, as shown in FIGS.7A and 7B, the commutation from mode 1 to mode 2 only has two steps:

-   -   (24) switch S₁₄ turns on, and    -   (25) switch S₁₆ turns off.        Thus, commutation from an active vector to a zero vector is        achieved. FIGS. 7A and 7B show an example of the 2-step        commutation from an active vector to a zero vector for a        positive current in sector I. Similar commutation steps are        performed in sectors III and V.

FIG. 15 shows a 2-step commutation from an active vector to a zerovector for a negative current in sector I. The commutation stepsinclude:

-   -   (26) switch S₂₁ turns on, and    -   (27) switch S₂₃ turns off.        Similar commutation steps are performed in sectors III and V.

FIG. 17 shows a 2-step commutation from an active vector to a zerovector for a positive current in sector II. The commutation stepsinclude:

-   -   (28) switch S₁₅ turns on, and    -   (29) switch S₁₁ turns off.        Similar commutation steps are performed in sectors IV and VI.

FIG. 19 shows a 2-step commutation from an active vector to a zerovector for a negative current in sector II. The commutation stepsinclude:

-   -   (30) switch S₂₂ turns on, and    -   (31) switch S₂₄ turns off.        Similar commutation steps are performed in sectors IV and VI.

(2) Zero Vector to Active Vector (Z-Vector to P-Vector or Z-Vector toN-Vector)

As seen in FIGS. 5 and 6, zero-vector-to-active-vector commutationsinclude the commutations from mode 2 (Z-vector) to mode 3 (N-vector),mode 4 (Z-vector) to mode 5 (P-vector), mode 6 (Z-vector) to mode 7(N-vector), and mode 8 (Z-vector) to mode 1 of the next sampling period(P-vector). During zero-vector-to-active-vector commutation, thedirection of the output current of the rectifier of the matrix converterchanges. Thus, zero-vector-to-active-vector commutation requires anadditional step. For example, as shown in FIGS. 8A and 8B, thecommutation from mode 2 to mode 3 in sector I includes three steps:

-   -   (32) switch S₁₅ turns on. The purpose of this step is to provide        a current path for the next step. Although switch S₁₅ is on in        this step, there is no current passing through switch S₁₅        because the voltage u_(a) is larger than the voltage u_(c) and        because the diode in series with the switch S₁₅ is reversed        biased. The output vector is still the Z-vector. The time span        Δt₁ that this step maintains can be decided according to the        overlap time of the current-source inverter. The overlap time is        added to make sure that the switch S₁₅ is on before switch S₁₁        turns off, considering the delay between the gate signals of the        switches S₁₁ and S₁₅.    -   (33) Switch S₁₁ turns off. After turning switch S₁₁ off, the        output vector is substantially the N-vector, so the output        current will be reduced sharply and reach zero quickly. This        step should last long enough to ensure that the current reaches        zero. The holding time Δt₂ of this step can be estimated by the        maximum current I_(1max) of the matrix converter, the minimum        output voltage U_(1min) of the matrix converter, and the leakage        inductance L_(o) of the transformer:

$\begin{matrix}{{\Delta t}_{2} = \frac{L_{o}I_{1\max}}{U_{1{{mi}n}}}} & (1)\end{matrix}$

-   -    For simplicity, the holding time Δt₂ can be selected as a fixed        value according to eq. (1). The holding time Δt₂ is determined        by the transition time required for the output current to reach        zero. The holding time Δt₂ based on eq. (1) is long enough to        ensure that the current reaches zero under all the conditions.    -   (34) Switches S₁₅ and S₁₄ turn off and switches S₂₄ and S₂₄ turn        on.        Thus, commutation from a zero vector to an active vector is        achieved. FIGS. 8A and 8B show an example of the 3-step        commutation from a zero vector to an active vector for a        positive current in sector I. Similar commutation steps are        performed in sectors III and V.

FIG. 16 shows a 3-step commutation from a zero vector to an activevector for a negative current in sector I. The commutation stepsinclude:

-   -   (35) switch S₂₂ turns on,    -   (36) switch S₂₄ turns off, and    -   (37) switches S₂₁ and S₂₂ turn off and switches S₁₁ and S₁₂ turn        on.        Similar commutation steps are performed in sectors III and V.

FIG. 18 shows a 3-step commutation from a zero vector to an activevector for a positive current in sector II. The commutation stepsinclude:

-   -   (38) switch S₁₆ turns on,    -   (39) switch S₁₂ turns off, and    -   (40) switches S₁₅ and S₁₆ turn off and switches S₂₅ and S₂₆ turn        on.        Similar commutation steps are performed in sectors IV and VI.

FIG. 20 shows a 3-step commutation from a zero vector to an activevector for a negative current in sector II. The commutation stepsinclude:

-   -   (41) switch S₂₃ turns on,    -   (42) switch S₂₅ turns off, and    -   (43) switches S₂₃ and S₂₂ turn off and switches S₁₃ and S₁₂ turn        on.        Similar commutation steps are performed in sectors IV and VI.

As shown in FIG. 10, the time periods (or “effective area” in FIG. 10)when only converter #1 is on and the time periods when only converter #2is on are separate from each other. In FIG. 10, the signal SelectCon1 is1 when converter #1 is on, i.e., the effective area for converter #1,and is 0 when converter #1 is off, i.e., the effective area forconverter #2. Similarly, the signal SelectCon2 when converter #2 is on,i.e., the effective area for converter #2, and is 0 when converter #2 isoff, i.e., the effective area for converter #1. As shown in FIG. 9, thefollowing three steps can be used to achieve modulation and commutation.

(1) Generate the Signals S_(i) (i=1, 2, 3, 4, 5, 6)

Accordingly, a carrier signal and three compare value signals CMP0,CMP1, CMP2 are used to generate the SVM PWM signals S_(i)′ (i=1, 2, 3,4, 5, 6). The compare values signals CMP0, CMP1, CMP2 are determined bythe dwell time of each vector. After the holding time Δt₁ for thefalling edge of signals S_(i)′ has lapsed, the signals S_(i) (i=1, 2, 3,4, 5, 6) can be generated. The falling edge of signal S_(i) is delayedfor holding time Δt₁ compared with the signal S_(i)′. An overlap time isadded to the signals S₁, S₃, S₅, and S₄, S₆, S₂ just as in thecommutation method of the current-source inverter. In sector I, forexample, the signals S₁, S₃, S₅ and S₄, S₆, S₂ are shown in FIG. 10.

(2) Generate Signal SelectCon1 and Signal SelectCon2

After comparison between the carrier signal and CMP1 and the delay Δt ofboth rising and falling edges, signal SelectCon1 can be generated, asshown in FIGS. 9 and 10. The fixed delay time Δt is based on the threesteps of zero-vector-to-active-vector commutation. So the delay time Δtcan be determined by eq. (2).

Δt=Δt ₁ +Δt ₂  (2)

where Δt_(t) is the overlap time and Δt₂ is estimated by eq. (1).

(3) Generate Gate Signals S_(i1) for Converter #1 and Gate SignalsS_(i2) for Converter #2

The gate signals S_(1j) for converter #1 can be generated by eq. (3),and the gate signals S_(2j) for converter #2 can be generated by eq.(4):

S _(1j) =S ₁×SelectCon1(j=1,3,5,4,6,2)  (3)

S _(2j) =S _(j)×SelectCon2(j=1,3,5,4,6,2)  (4)

For example, in sector I, the gate signals S₁₁, S₁₃, S₁₅, S₁₄, S₁₆, andS₁₂ are generated for converter #1, and the gate signals S₂₁, S₂₃, S₂₂,S₂₄, S₂₆, and S₂₂ are generated for converter #1 as shown in FIG. 10.

FIGS. 11-13 show the gate signals generated using a field programmablegate array (FPGA) to implement the method described above. FIG. 11 showsthe gate signals for switches S₁ to S₆ in sector I. The time period fromtime t₁ to time t₉ is one sampling period T_(s). Times t₂, t₄, t₆, andt₈ use 2-step commutation, and times t₁, t₂, t₃, t₇, and t₉ use 3-stepcommutation.

For example, at time t₂, the commutation from mode 1 to mode 2 (fromactive vector to zero vector) as shown in FIG. 7 is in two steps. The2-step commutation waveforms are shown in FIG. 12. At time t₃, thecommutation from mode 2 to mode 3 (from zero vector to active vector) asshown in FIG. 8 is in three steps. The 3-step commutation waveforms areshown in FIG. 13.

It should be understood that the foregoing description is onlyillustrative of the present invention. Various alternatives andmodifications can be devised by those skilled in the art withoutdeparting from the present invention. Accordingly, the present inventionis intended to embrace all such alternatives, modifications, andvariances that fall within the scope of the appended claims.

What is claimed is:
 1. A matrix rectifier comprising: first, second, andthird phases; and uni-directional switches Sij, where i=1, 2 and j=1, 2,3, 4, 5, 6 and where uni-directional switches S1 j and S2 j areconnected together to define first, second, third, fourth, fifth, andsixth bi-directional switches; wherein first ends of the first, third,and fifth bidirectional switches are connected together to provide apositive-voltage node; first ends of the second, fourth, and sixthbidirectional switches are connected together to provide anegative-voltage node; second ends of the first and fourth bidirectionalswitches are connected to the first phase; second ends of the third andsixth bidirectional switches are connected to the second phase; secondends of the fifth and second bidirectional switches are connected to thethird phase; a zero vector is defined by either uni-directional switchesS1 m and S1 n switched on or unidirectional switches S2 m and S2 nswitched on, where (m, n)=(1, 4), (3, 6), (5, 2), and by all otheruni-directional switches Spq switched off, where p≠m and q≠n; an activevector is defined by either uni-directional switches S1 m and S1 nswitched on or uni-directional switches S2 m and S2 n switched on, wherem=1, 3, 5; n=2, 4, 6; and m, n are not connected to the same phase, andby all other uni-directional switches Spq switched off, where p≠m andq≠n; Sectors I, II, III, IV, V, and VI are defined by using activevectors with (a, b)=(1, 6), (1, 2), (3, 2), (3, 4), (5, 4), and (5, 6);commutation from an active vector to a zero vector includes: step (a):for an active vector with uni-directional switches S1 m and S1 nswitched on, in Sectors I, III, V, turning on uni-directional switch S1x, where x is chosen such that (m, x)=(1, 4), (3, 6), (5, 2); and inSectors II, IV, VI, turning on uni-directional switch S1 x, where x ischosen such that (x, n)=(1, 4), (3, 6), (5, 2); or for an active vectorwith uni-directional switches S2 m and S2 n switched on, in Sectors I,III, V, turning on uni-directional switch S2 y, where y is chosen suchthat (y, n)=(1, 4), (3, 6), (5, 2); and in Sectors II, IV, VI, turningon uni-directional switch S2 y, where y is chosen such that (m, y)=(1,4), (3, 6), (5, 2); and step (b): for the active vector withuni-directional switches S1 m and S1 n initially switched on, in SectorsI, III, V, turning off uni-directional switch S1 n; and in Sectors II,IV, VI, turning off uni-directional switch S1 m; or for the activevector with uni-directional switches S2 m and S2 n initially switchedon, in Sectors I, III, V, turning off uni-directional switch S2 m; inSectors II, IV, VI, turning off uni-directional switch S2 n; thecommutation includes measuring output voltage and not measuring outputcurrent or input voltage.
 2. A matrix rectifier comprising: first,second, and third phases; and uni-directional switches Sij, where i=1, 2and j=1, 2, 3, 4, 5, 6 and where uni-directional switches S1 j and S2 jare connected together to define first, second, third, fourth, fifth,and sixth bi-directional switches; wherein first ends of the first,third, and fifth bidirectional switches are connected together toprovide a positive-voltage node; first ends of the second, fourth, andsixth bidirectional switches are connected together to provide anegative-voltage node; second ends of the first and fourth bidirectionalswitches are connected to the first phase; second ends of the third andsixth bidirectional switches are connected to the second phase; secondends of the fifth and second bidirectional switches are connected to thethird phase; a zero vector is defined by either uni-directional switchesS1 m and S1 n switched on or unidirectional switches S2 m and S2 nswitched on, where (m, n)=(1, 4), (3, 6), (5, 2), and by all otheruni-directional switches Spq switched off, where p≠m and q≠n; an activevector is defined by either uni-directional switches S1 m and S1 nswitched on or uni-directional switches S2 m and S2 n switched on, wherem=1, 3, 5; n=2, 4, 6; and m, n are not connected to the same phase, andby all other uni-directional switches Spq switched off, where p≠m andq≠n; and Sectors I, II, III, IV, V, and VI are defined by using activevectors with (a, b)=(1, 6), (1, 2), (3, 2), (3, 4), (5, 4), and (5, 6);commutation from a zero vector to an active vector includes: step (a):for a zero vector with uni-directional switches S1 m and S1 n switchedon, in Sectors I, III, V, turning on uni-directional switch S1 x, wherex=1, 3, 5 and x is chosen such that a negative voltage is provided atthe positive-voltage node; and in Sectors II, IV, VI, turning onuni-directional switch S1 x, where x=2, 4, 6 and x is chosen such that apositive voltage is provided at the negative-voltage node; or for a zerovector with uni-directional switches S2 m and S2 n switched on, inSectors I, III, V, turning on uni-directional switch S2 y, where y=2, 4,6 and y is chosen such that a positive voltage is provided at thenegative-voltage node; and in Sectors II, IV, VI, turning onuni-directional switch S2 y, where y=1, 3, 5 and y is chosen such that anegative voltage is provided at the positive-voltage node; step (b): forthe zero vector with uni-directional switches S1 m and S1 n initiallyswitched on, in Sectors I, III, V, turning off uni-directional switch S1m; and in Sectors II, IV, VI, turning off uni-directional switch S1 n;or for the zero vector with uni-directional switches S2 m and S2 ninitially switched on, in Sectors I, III, V, turning off uni-directionalswitch S2 n; and in Sectors II, IV, VI, turning off uni-directionalswitch S2 m; and step (c): for the zero vector with uni-directionalswitches S1 m and S1 n initially switched on, in Sectors I, III, V,turning off uni-directional switches S1 x and S1 n and turning onuni-directional switches S2 x and S2 n; and in Sectors II, IV, VI,turning off uni-directional switches S1 x and S1 m and turning onuni-directional switches S2 x and S2 m; or for the zero vector withuni-directional switches S2 m and S2 n initially switched on, in SectorsI, III, V, turning off uni-directional switches S2 m and S2 y andturning on uni-directional switches S1 m and S1 y; and in Sectors II,IV, VI, turning off uni-directional switches S2 n and S2 y and turningon uni-directional switches S1 n and S1 y; the commutation includesmeasuring output voltage and not measuring output current or inputvoltage.